| TÃtulo : |
33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I |
| Tipo de documento: |
documento electrónico |
| Autores: |
Silva, Alexandra, ; Leino, K. Rustan M., |
| Mención de edición: |
1 ed. |
| Editorial: |
[s.l.] : Springer |
| Fecha de publicación: |
2021 |
| Número de páginas: |
XXIV, 922 p. 287 ilustraciones, 171 ilustraciones en color. |
| ISBN/ISSN/DL: |
978-3-030-81685-8 |
| Nota general: |
Libro disponible en la plataforma SpringerLink. Descarga y lectura en formatos PDF, HTML y ePub. Descarga completa o por capítulos. |
| Palabras clave: |
IngenierÃa de software Inteligencia artificial Ciencias de la Computación TeorÃa de las máquinas Simulación por ordenador Lógica informática y fundamentos de la programación Lenguajes formales y teorÃa de los autómatas Modelado por computadora |
| Ãndice Dewey: |
005.1 Programación (Computadoras) |
| Resumen: |
Este conjunto de dos volúmenes de acceso abierto LNCS 12759 y 12760 constituye las actas arbitradas de la 33.a Conferencia Internacional sobre Verificación Asistida por Computadora, CAV 2021, celebrada virtualmente en julio de 2021. Los 63 artÃculos completos presentados junto con 16 artÃculos sobre herramientas y 5 artÃculos invitados fueron cuidadosamente revisado y seleccionado entre 290 presentaciones. Los artÃculos se organizaron en las siguientes secciones temáticas: Parte I: artÃculos invitados; Verificación de IA; concurrencia y blockchain; sistemas hÃbridos y ciberfÃsicos; seguridad; y sÃntesis. Parte II: complejidad y terminación; procedimientos de decisión y solucionadores; verificación de hardware y modelos; fundamentos lógicos; y verificación de software. Este es un libro de acceso abierto. |
| Nota de contenido: |
Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics andaxiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
| En lÃnea: |
https://link-springer-com.biblioproxy.umanizales.edu.co/referencework/10.1007/97 [...] |
| Link: |
https://biblioteca.umanizales.edu.co/ils/opac_css/index.php?lvl=notice_display&i |
33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I [documento electrónico] / Silva, Alexandra, ; Leino, K. Rustan M., . - 1 ed. . - [s.l.] : Springer, 2021 . - XXIV, 922 p. 287 ilustraciones, 171 ilustraciones en color. ISBN : 978-3-030-81685-8 Libro disponible en la plataforma SpringerLink. Descarga y lectura en formatos PDF, HTML y ePub. Descarga completa o por capítulos.
| Palabras clave: |
IngenierÃa de software Inteligencia artificial Ciencias de la Computación TeorÃa de las máquinas Simulación por ordenador Lógica informática y fundamentos de la programación Lenguajes formales y teorÃa de los autómatas Modelado por computadora |
| Ãndice Dewey: |
005.1 Programación (Computadoras) |
| Resumen: |
Este conjunto de dos volúmenes de acceso abierto LNCS 12759 y 12760 constituye las actas arbitradas de la 33.a Conferencia Internacional sobre Verificación Asistida por Computadora, CAV 2021, celebrada virtualmente en julio de 2021. Los 63 artÃculos completos presentados junto con 16 artÃculos sobre herramientas y 5 artÃculos invitados fueron cuidadosamente revisado y seleccionado entre 290 presentaciones. Los artÃculos se organizaron en las siguientes secciones temáticas: Parte I: artÃculos invitados; Verificación de IA; concurrencia y blockchain; sistemas hÃbridos y ciberfÃsicos; seguridad; y sÃntesis. Parte II: complejidad y terminación; procedimientos de decisión y solucionadores; verificación de hardware y modelos; fundamentos lógicos; y verificación de software. Este es un libro de acceso abierto. |
| Nota de contenido: |
Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics andaxiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
| En lÃnea: |
https://link-springer-com.biblioproxy.umanizales.edu.co/referencework/10.1007/97 [...] |
| Link: |
https://biblioteca.umanizales.edu.co/ils/opac_css/index.php?lvl=notice_display&i |
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33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I
